Forum: BrightSpots Lithography F... |
This question came in from a webcast viewer: Have some logic chips already stopped scaling at 90 or 65 nm? Beyond microprocessors, will all logic keep scaling down to 22 nm and then 16 nm? Will EBDW enable logic to scale further than it would otherwise?
Yes, many many many designs have stopped scaling at 90nm and 65nm. The general trend is to do platform designs that are "programmed" via embedded software/firmware or "re-programmed" via FPGA-like mechanisms. Many SOC designs or ASIC type designs that would have been "custom chips" at 90nm are now no longer. People who want custom chips now, often choose 65nm instead of the 28nm or 45nm alternatives because of cost.
We see Intel strategically buying IP to become the platform supplier of the future in this environment. Some day not too far away, a platform design contains all the parts we need, and it can be programmed or re-programmed (like Tabula) to do a large variety of tasks. And it'll be cheap enough because of the huge volumes.
To contrast, the innovative power of the semiconductor designers are much much greater than what the cost structure is allowing today at the leading edge nodes. There are a huge variety of computing that cannot be done, especially in real-time, without custom silicon engineering at the leading edge nodes. We aren't even close to the limit on matching human visual perception or even auditory perception especially through noisy channels. When's the last time you were on the phone saying "can you say that again?" and thought that the international calls in 1970 had better voice quality?
The innovative power of the silicon innovators need to be unleashed to increase design starts and the leading edge nodes. Increasing design starts at the leading edge nodes will help literally every single company in the semiconductor supply chain.
There is no question that removing the mask cost barrier with EbDW will enable this innovation at the leading edge nodes. In addition, another type of innovation which comes from derivative designs is enabled with EbDW. Derivative designs are designs that share majority of the chip with an existing successful platform design, but is different in some unique ways at the transistor-level. These designs have low design costs, but have the same high mask costs. They help enable electronic systems to differentiate, increasing value in the value chain, therefore enabling more value to flow through the supply chain to semiconductors.