Will alternative methods of interconnect slow down TSV's progress?
Will alternative interconnect technologies
like Vertical Circuits Vertical Interconnect Pillars, or 3D Plus’s WDoD (wire-free die-on-die) technology based
on “known rebuilt good wafers’ affect market adoption ofTSV stacked ICS? Why or why not?
The Vertical Circuits approach or the 3D Plus approach do address I/O level 3D. One can argue the merits of either of these verses a TSV approach, but cost will be the ultimate driver. I think Vertical circuits has a great solution for packaging stacked Flash today, but this will not address <10um pitch interconnects. Large deep TSVs for stacking die as an alternative to wire bonding or either of the mentioned approaches has a tough row to hoe. TSVs for circuit level 3D is the only clear choice and there are no other alternatives that I see.
