Lack of design tools has been identified as one of the current roadblocks to market adoption. Ricardo, from your perspective as a member of the design tool community, what new capabilities are
required of EDA tools in order to support 3D IC design?
Tools have made designing more difficult, but a fair amount of progress has been made by the tool vendors. The MicroMagic (MMI) 3D Max tool has all of the features to allow real 3D editing and visualization for physical editing. The big piece we saw missing in the backend of the tool chain was the verification. I think we are on the road to having that solved soon. MMI has been working on tool hooks that will allow 3D DRC and LVS to be reasonable with Magma Quartz. I expect the back end flow to be complete with no ugly hand manipulation within a couple of months. We also have been working with Magma to complete other pieces of the flow. I don't think that we will see a multilayer synthesis, place and route in the next year, but we will see it. In the meantime, with a good physical editor, DRC and LVS in place, a lot of work can be done.
As with the rest of the value chain, EDA is in the ramp up
phase, but I have every reason to believe that EDA will be ready to support 3D
IC as market adoption takes hold. Over the past six months, design teams have
been crystallizing their requirements and priorities which, of course, is a big
step in defining development goals and roadmaps. Not surprisingly, virtually
the entire design flow will require enhancements for 3D IC design, but most of
new enhancements will be built as extensions of the existing tools and flows.Current chip interconnects are obviously
already 3D structures, so EDA tools have a 3D baseline from which to develop
new capabilities.
On the technology side, TSV reliability requires tools to
compute the stresses generated from thermal expansion mismatches of the different
materials in the stack, wafer thinning, etc. These stresses can also impact
transistor performance because of piezo-resistive effects, and thus we see work
ahead in defining design rules that account for proximity to TSVs.
Connecting the technology and design sides, EDA tools that
allow virtual co-exploration of new 3D IC technology with design goals as
constraints might also become important since waiting for a technology to be
fully defined before starting design activities is inefficient and takes too
long.
So in other words, would you say the design community is waiting for market adoption of technologies before rolling out tools? It seems to be somewhat of a chicken-and-egg situation. The design community needs process technologies, characterization, parameters and prototypes to be determined before design rules can be established, yet fabless companies need design tools before they can take TSV stacking to volume production.
What we are seeing
is quite normal. The design companies, i.e. our customers, have been busy
defining their requirements for design tools and flows now that the technology
has achieved critical demonstration milestones. On the other hand, we have been
doing our own R&D on what we think is necessary to support 3D IC design,
and we’ve now entered the phase when we “compare notes” with our customers and
decide on how to sequence the tool developments to meet their timelines.
This is not so
much a chicken-and-egg situation. It’s more of an iterative process where we
develop capabilities to enable the initial designs and then refine and enhance
these capabilities based on what our customers encounter when they start
designing in production. Again, we are very used to this process and went
through a similar scenario when tools and flows had to be upgraded to account
for sub-wavelength lithography, leakage power, variability, etc.
Now, regarding
design rules, we can do a lot of design tool development without having firm
design rules. The important thing is to know what types of new rules will be
necessary and then, as the technologies get released to production there will
be an activity to extract the design rules specify to the technology and make
them available for the design tools to use.
In my opinion, 3DIC EDA/CAD tools must come first in order for companies to quantitatively evaluate the potential benefits of 3DIC technology to their applications and business needs. The large CAD companies will always wait for the market demand before moving forward. So forward thinking (and adequately funded) startups will likely lead the key work in this area.
Michael,
But is it only the large CAD companies that will be taken seriously here? Several smaller companies, such as Javelin Design Automation and R3Logic, have been announcing achievements specifically targeted to 3D IC. Last year, Javelin and IMEC developed and validated a Pathfinding flow to determine design rules and models for virtual chip design. Just last month, R3Logic announced a collaborative effort with CEA-Leti to develop and enhance its design tools for 3D heterogeneous system and SiP design. Will this project serve as a motivating factor for the bigger players to jump in to the mix?
I believe that most real EDA/CAD innovation is always done by startups who are willing to work a new technology before the market demand is there. If they succeed and the market develops, the larger CAD folks will buy them. It is very important to have basic 3DIC CAD capability FIRST in order for companies to determine the value of this technology for their applications. Thus the startups are playing a critical role in this field at the moment.
Thanks for your candid response. I have had this discussion with different individuals on several occasions, but none that made it to print. It seems as though this is the way things are heading, It will certainly be interesting to see if this prediction comes true.
While Ric Borges
reports work at Synopsis ramping to provide tools in time for market adoption
of 3D IC integration. Design teams are establishing requirements and priorities
as a step towards establishing roadmaps. He says 3D tools will be built on existing
platforms. Borges also sees a need for
tools to compute thermal mismatch stresses, and Synopsis is doing work in this
area.
In the mean time,
start-ups like R3 Logic, MicroMagic and Javelin Design Automation have
introduced layout editors, pathfinding tools, etc. for designing 3D ICs,
thereby fulfilling a critical role by providing tools with which companies can
determine the value of 3D IC technologies in different applications. It's a widely held understanding that these
start-up companies have the flexibility to work with a new technology before
the market demand is there. If they succeed and the market develops, the
larger companies are likely to acquire them.
Hi Francoise,
Tools have made designing more difficult, but a fair amount of progress has been made by the tool vendors. The MicroMagic (MMI) 3D Max tool has all of the features to allow real 3D editing and visualization for physical editing. The big piece we saw missing in the backend of the tool chain was the verification. I think we are on the road to having that solved soon. MMI has been working on tool hooks that will allow 3D DRC and LVS to be reasonable with Magma Quartz. I expect the back end flow to be complete with no ugly hand manipulation within a couple of months. We also have been working with Magma to complete other pieces of the flow. I don't think that we will see a multilayer synthesis, place and route in the next year, but we will see it. In the meantime, with a good physical editor, DRC and LVS in place, a lot of work can be done.
Hello Françoise,
As with the rest of the value chain, EDA is in the ramp up phase, but I have every reason to believe that EDA will be ready to support 3D IC as market adoption takes hold. Over the past six months, design teams have been crystallizing their requirements and priorities which, of course, is a big step in defining development goals and roadmaps. Not surprisingly, virtually the entire design flow will require enhancements for 3D IC design, but most of new enhancements will be built as extensions of the existing tools and flows. Current chip interconnects are obviously already 3D structures, so EDA tools have a 3D baseline from which to develop new capabilities.
On the technology side, TSV reliability requires tools to compute the stresses generated from thermal expansion mismatches of the different materials in the stack, wafer thinning, etc. These stresses can also impact transistor performance because of piezo-resistive effects, and thus we see work ahead in defining design rules that account for proximity to TSVs.
Connecting the technology and design sides, EDA tools that allow virtual co-exploration of new 3D IC technology with design goals as constraints might also become important since waiting for a technology to be fully defined before starting design activities is inefficient and takes too long.
Regarding #2
So in other words, would you say the design community is waiting for market adoption of technologies before rolling out tools? It seems to be somewhat of a chicken-and-egg situation. The design community needs process technologies, characterization, parameters and prototypes to be determined before design rules can be established, yet fabless companies need design tools before they can take TSV stacking to volume production.Hi Françoise:
What we are seeing is quite normal. The design companies, i.e. our customers, have been busy defining their requirements for design tools and flows now that the technology has achieved critical demonstration milestones. On the other hand, we have been doing our own R&D on what we think is necessary to support 3D IC design, and we’ve now entered the phase when we “compare notes” with our customers and decide on how to sequence the tool developments to meet their timelines.
This is not so much a chicken-and-egg situation. It’s more of an iterative process where we develop capabilities to enable the initial designs and then refine and enhance these capabilities based on what our customers encounter when they start designing in production. Again, we are very used to this process and went through a similar scenario when tools and flows had to be upgraded to account for sub-wavelength lithography, leakage power, variability, etc.
Now, regarding design rules, we can do a lot of design tool development without having firm design rules. The important thing is to know what types of new rules will be necessary and then, as the technologies get released to production there will be an activity to extract the design rules specify to the technology and make them available for the design tools to use.
Regarding #3
Francoise,
In my opinion, 3DIC EDA/CAD tools must come first in order for companies to quantitatively evaluate the potential benefits of 3DIC technology to their applications and business needs. The large CAD companies will always wait for the market demand before moving forward. So forward thinking (and adequately funded) startups will likely lead the key work in this area.
Regarding #5
Michael,
But is it only the large CAD companies that will be taken seriously here? Several smaller companies, such as Javelin Design Automation and R3Logic, have been announcing achievements specifically targeted to 3D IC. Last year, Javelin and IMEC developed and validated a Pathfinding flow to determine design rules and models for virtual chip design. Just last month, R3Logic announced a collaborative effort with CEA-Leti to develop and enhance its design tools for 3D heterogeneous system and SiP design. Will this project serve as a motivating factor for the bigger players to jump in to the mix?
Regarding #6
Francoise,
I believe that most real EDA/CAD innovation is always done by startups who are willing to work a new technology before the market demand is there. If they succeed and the market develops, the larger CAD folks will buy them. It is very important to have basic 3DIC CAD capability FIRST in order for companies to determine the value of this technology for their applications. Thus the startups are playing a critical role in this field at the moment.
Regarding #7
Michael -
Thanks for your candid response. I have had this discussion with different individuals on several occasions, but none that made it to print. It seems as though this is the way things are heading, It will certainly be interesting to see if this prediction comes true.
While Ric Borges reports work at Synopsis ramping to provide tools in time for market adoption of 3D IC integration. Design teams are establishing requirements and priorities as a step towards establishing roadmaps. He says 3D tools will be built on existing platforms. Borges also sees a need for tools to compute thermal mismatch stresses, and Synopsis is doing work in this area.
In the mean time, start-ups like R3 Logic, MicroMagic and Javelin Design Automation have introduced layout editors, pathfinding tools, etc. for designing 3D ICs, thereby fulfilling a critical role by providing tools with which companies can determine the value of 3D IC technologies in different applications. It's a widely held understanding that these start-up companies have the flexibility to work with a new technology before the market demand is there. If they succeed and the market develops, the larger companies are likely to acquire them.