Existing pick-and-place/die bonding tools can either achieve speed, or accuracy in alignment required for D2D stacking, but not both. How is this being addressed? Sitaram - are there any plans at SEMATECH to address this issue?
This comment is based on a single discussion at SEMICON West last week. I happened to pass the Panasonic booth and stopped to talk to one of their applications engineers about 50 micron thin pick-and-place tooling (Ref: http://www.panasonicfa.com/?id=MD-P200). He seemed confident that evolutions of current technologies--using lower tack tape, replacing hard pins with soft posts, etc.--should work to pick-and-place 50 micron thin silicon with similar speed and precision to standard benchmarks today...25 microns and thinner may need a revolution in technology.
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